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(R)
VN750 / VN750S / VN750-B5
HIGH SIDE DRIVER
TYPE VN750 VN750S VN750-B5
RDS(on) 60 m
IOUT 6A
VCC 36 V
CMOS COMPATIBLE INPUT ON STATE OPEN LOAD DETECTION s OFF STATE OPEN LOAD DETECTION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT
s s s
SO-8
PENTAWATT
P2PAK ORDER CODES : PENTAWATT SO-8 P2PAK VN750 VN750S VN750-B5
REVERSE BATTERY PROTECTION (*)
DESCRIPTION The VN750, VN750S, VN750-B5 are a monolithic device designed in STMicroelectronics VIPower Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation BLOCK DIAGRAM
combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection.
VC C
VCC CLAMP
OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION
GND Power CLAMP
INPUT LOGIC
DRIVER OUTPUT CURRENT LIMITER
STATUS
ON STATE OPENLOAD DETECTION OVERTEMPERATURE DETECTION
OFF STATE OPENLOAD AND OUTPUT SHORTED TO V CC DETECTION
(*) See application schematic at page 8
January 2000
1/15
1
VN750 / VN750S / VN750-B5
ABSOLUTE MAXIMUM RATING
Symbol VCC - V CC - Ignd IOUT - IOUT IIN ISTAT VESD Ptot Tj Tc Tstg Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (R=1.5K; C=100pF) Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature SO-8 Value PENTAWATT 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 2000 42 Internally Limited - 40 to 150 - 55 to 150 P2PAK Unit V V mA A A mA mA V W C C C
3.1
42
CONNECTION DIAGRAM (TOP VIEW)
OUTPUT STATUS V
CC
5
VCC OUTPUT OUTPUT VCC
5
4
8
1
N.C. STATUS INPUT GND
4 3 2 1
INPUT GND
SO-8
P2PAK
PENTAWATT
CURRENT AND VOLTAGE CONVENTIONS
ICC
IIN INPUT ISTAT STATUS
VCC
IOUT OUTPUT GND VCC
VIN VSTAT IGND
VOUT
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1
VN750 / VN750S / VN750-B5
THERMAL DATA
Symbol Rthj-pins Rthj-amb Rthj-case Parameter Thermal Resistance Junction-pins Thermal Resistance Junction-ambient Thermal Resistance Junction-case S0-8 40 120 Value PENTAWATT 60 3 P2PAK 60 3 Unit C/W C/W C/W
Max Max Max
ELECTRICAL CHARACTERISTICS (8VSymbol VCC VUSD VUSDhyst VOV RON IS IL(off1) IL(off2) Parameter Operating Supply Voltage Under Voltage Shut-down Under Voltage Shut-down Hysteresis Overvoltage Shut-down On State Resistance Supply Current Off State Output Current Off State Output Current Test Conditions Min 5.5 3 Typ 13 4 0.5 36 IOUT=2A; Tj=25C; VCC>8V IOUT=2A; VCC>8V Off State; VCC=13V On State; VCC=13V VIN=VOUT=0V VIN=0V; VOUT =3.5V (*) (*) 10 2 (*) 48 60 120 25 3.5 50 0 Max 36 5.5 Unit V V V V m m A mA A A
0 -75
SWITCHING (VCC=13V)
Symbol td(on) td(off) dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Turn-off Voltage Slope Test Conditions RL=6.5 from VIN rising edge to VOUT=1.3V RL=6.5 from VIN falling edge to VOUT=11.7V RL=6.5 from VOUT=1.3V to VOUT=10.4V RL=6.5 from VOUT=11.7V to VOUT=1.3V Min Typ 40 30 (*) (*) Max Unit s s V/s V/s
INPUT PIN
Symbol VIL IIL VIH IIH Vhyst VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN=1.25V VIN=3.25V IIN=1mA IIN=-1mA 0.5 6.5 Min 1 3.25 Typ (*) (*) (*) (*) (*) (*) -0.7 Max 1.25 Unit V A V A V V V
10 8.5
(*) See curves at pages 9, 10, 11
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1
VN750 / VN750S / VN750-B5
ELECTRICAL CHARACTERISTICS (continued) STATUS PIN
Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT=1.6mA Status Leakage Current Normal Operation VSTAT=5V Status Pin Input Normal Operation VSTAT=5V Capacitance ISTAT=1mA Status Clamp Voltage ISTAT=-1mA Min Typ (*) (*) Max 0.5 10 100 6.5 (*) -0.7 8.5 Unit V A pF V V
PROTECTIONS
Symbol T TSD TR Thyst tSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status delay in overload condition Current limitation Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 6 9 15 15 VCC-41 VCC-48 VCC-55 Max 200 Unit C C C s A A V
Tj>Tjsh 9VOPENLOAD DETECTION
Symbol IOL tDOL(on) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT=0A Min 50 Typ (*) Max 200 200 Unit mA s
VOL tDOL(off)
VIN=0V
1.5
(*)
3.5
V s
1000
(*) See curves at pages 9, 10, 11
OPEN LOAD STATUS TIMING (with external pull-up) IOUT< IOL VOUT > VOL VIN VIN
OVER TEMP STATUS TIMING T j > Tjsh
VSTAT
VSTAT
tDOL(off)
tDOL(on)
tSDL
tSDL
4/15
2
1
VN750 / VN750S / VN750-B5
Switching time Waveforms
VOUT 90% 80%
dVOUT /dt(on)
dVOUT/dt(off)
10%
t
VIN td(on) td(off)
t
TRUTH TABLE
CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H L H L H L H L H L H OUTPUT L H L X L L L L L L H H L H STATUS H H H H H L X X H H L H H L
5/15
1
VN750 / VN750S / VN750-B5
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I C C C C C C I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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1
VN750 / VN750S / VN750-B5
Figure1: Waveforms
NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VUSD INPUT LOAD VOLTAGE STATUS undefined
VCC
OVERVOLTAGE VCCVOL VOL VCC>V OV
OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS
Tj INPUT LOAD CURRENT STATUS
TTSD TR
OVERTEMPERATURE
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1 1
VN750 / VN750S / VN750-B5
APPLICATION SCHEMATIC
+5V
+5V
Rprot STATUS
VCC
Dld C Rprot INPUT OUTPUT
GND
VGND
RGND
DGND
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (I S(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j 600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Transil or MOV) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table.
C I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak /Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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1
1
VN750 / VN750S / VN750-B5
Off State Output Current High Level Input Current
IL(off1) (A)
2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -50 -25 0 25 50 75 100 125 150 Tc (C)
IIH(A)
11 10
Off state Vcc=36V VIN=VOUT=0V
9 8 7 6 5 4 3 2 1 0 -50
VIN=3.25V
-25
0
25
50
75
100
125
150
Tc(C)
Input Clamp Voltage
Status Leakage Current
VICL (V)
10.0 9.5 9.0 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 -50 -25 0 25 50 75 100 125 150 Tc(C)
ILSTAT (A)
0.250 0.200
Vstat=5V
0.150 0.100 0.050 0.000
IIN=1mA
-0.050 -0.100 -50 -25 0 25 50 75 100 125 150 Tc(C)
Status Low Output Voltage
Status Clamp Voltage
VSTAT (V)
0.550 0.500 0.450 0.400 0.350 0.300 0.250 0.200 0.150 0.100 -50 -25 0 25 50 75 100 125 150 Tc(C)
VSCL (V)
9.5 9.0
Istat=1.6mA
Istat=1mA
8.5 8.0 7.5 7.0 6.5 6.0 5.5 -50 -25 0 25 50 75 100 125 150
Tc(C)
9/15
1
VN750 / VN750S / VN750-B5
On State Resistance Vs Tcase On State Resistance Vs VCC
RON (mOhm)
120 110 100 90 80 70 60 50 40 30 20 10 -50 -25 0 25 50 75 100 125 150 Tc(C)
RON (mOhm)
130 120 110 100 90 80 70 60 50 40 30 20 5 10 15 20 25 30 35 Vcc (V) 25C -40C 125C
IOUT=2A Vcc=8V; 13V; 36V
Iout=2A Tc=-40C; 25C; 125 C; 150C
150C
Openload On State Detection Threshold
Input High Level
VIH (V)
3.3
IOL (mA)
220 200 180 160 140 120 100
Vcc=13V VIN=5V
3.2 3.1 3.0 2.9 2.8
80 60 40 20 -50 -25 0 25 50 75 100 125 150 Tc(C)
2.7 2.6 2.5 -50 -25 0 25 50 75 100 125 150 Tc(C)
Input Low Level
Input Hysteresis Voltage
VIL (V)
2.1 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 -50 -25 0 25 50 75 100 125 150 Tc(C)
VHYST (V)
1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 -50 -25 0 25 50 75 100 125 150 Tc(C)
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1
1
VN750 / VN750S / VN750-B5
Overvoltage Shutdown Openload Off State Voltage Detection Threshold
VOV (V)
46 45 44 43 42 41 40 39 38 37 36 35 -50 -25 0 25 50 75 100 125 150 Tc(C)
VOL (V)
3.50
VIN=0V
3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 -50 -25 0 25 50 75 100 125 150 Tc(C)
Turn-on Voltage Slope
dVOUT/dt(on) (V/ms)
325 300 275 250 225 200 175 150 125 100 75 50 -50 -25 0 25 50 75 100 125 150 Tc(C)
Turn-off Voltage Slope
dVOUT/dt(off) (V/ms)
450
Rl=6.5Ohm
Rl=6.5Ohm
400 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 Tc(C) Avg
11/15
1
1
VN750 / VN750S / VN750-B5
SO-8 MECHANICAL DATA
mm. MIN. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4 1.27 0.6 8 (max.) 0.8 1.2 0.031 0.047 0.14 0.015 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5 6.2 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019
DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S L1
12/15
1 1
VN750 / VN750S / VN750-B5
PENTAWATT (VERTICAL) MECHANICAL DATA
DIM. A C D D1 E F F1 G G1 H2 H3 L L1 L2 L3 L5 L6 L7 M M1 Diam. 3.65 2.6 15.1 6 4.5 4 3.85 0.144 10.05 17.85 15.75 21.4 22.5 3 15.8 6.6 0.102 0.594 0.236 0.177 0.157 0.152 2.4 1.2 0.35 0.8 1 3.2 6.6 3.4 6.8 mm. MIN. TYP MAX. 4.8 1.37 2.8 1.35 0.55 1.05 1.4 3.6 7 10.4 10.4 0.396 0.703 0.620 0.843 0.886 0.118 0.622 0.260 0.094 0.047 0.014 0.031 0.039 0.126 0.260 0.134 0.268 MIN. inch TYP. MAX. 0.189 0.054 0.110 0.053 0.022 0.041 0.055 0.142 0.276 0.409 0.409
13/15
1
VN750 / VN750S / VN750-B5
P2PAK MECHANICAL DATA
DIM. A A2 C D D1 E F G G1 H2 L L2 L3 R V2 0d 13.59 1.27 1.30 0.30 8d mm. MIN. 4.30 0.03 1.17 2.40 8.95 0.35 0.80 3.20 6.60 TYP MAX. 4.80 0.23 1.37 2.80 9.35 0.55 1.05 3.60 7.00 10.40 14.39 1.40 1.70 MIN. inch TYP. MAX.
14/15
1
VN750 / VN750S / VN750-B5
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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